--- title: "Quantivine: A Visualization Approach for Large-scale Quantum Circuit Representation and Analysis" authors: - Zhen Wen - Yihan Liu - Siwei Tan - Jieyi Chen - Minfeng Zhu - Dongming Han - Jianwei Yin - Mingliang Xu - Wei Chen abstract: Quantum computing is a rapidly evolving field that enables exponential speed-up over classical algorithms. At the heart of this revolutionary technology are quantum circuits, which serve as vital tools for implementing, analyzing, and optimizing quantum algorithms. Recent advancements in quantum computing and the increasing capability of quantum devices have led to the development of more complex quantum circuits. However, traditional quantum circuit diagrams suffer from scalability and readability issues, which limit the efficiency of analysis and optimization processes. In this research, we propose a novel visualization approach for large-scale quantum circuits by adopting semantic analysis to facilitate the comprehension of quantum circuits. We first exploit meta-data and semantic information extracted from the underlying code of quantum circuits to create component segmentations and pattern abstractions, allowing for easier wrangling of massive circuit diagrams. We then develop Quantivine, an interactive system for exploring and understanding quantum circuits. A series of novel circuit visualizations are designed to uncover contextual details such as qubit provenance, parallelism, and entanglement. The effectiveness of Quantivine is demonstrated through two usage scenarios of quantum circuits with up to 100 qubits and a formal user evaluation with quantum experts. A free copy of this paper and all supplemental materials are available at https://osf.io/2m9yh/. summaryType: survey sourceStatus: null sources: - https://doi.org/10.1109/TVCG.2023.3327148 --- [Read the original paper](https://doi.org/10.1109/TVCG.2023.3327148). ## Background and motivation Quantivine addresses the established problem of making large quantum circuits understandable from their diagrams. A conventional circuit diagram assigns a horizontal wire to each qubit, places gates from left to right in execution order, and connects wires for operations involving multiple qubits. This representation makes local dependencies visible, but it can obscure algorithmic components and repeated structures when a circuit contains many gates or qubits. The paper contrasts a manually abstracted quantum principal component analysis diagram with a detailed, automatically generated 10-qubit, 306-gate diagram in Figure 2. These examples motivate the readability problem rather than constitute a controlled comparison of visualization performance. Hand-drawn diagrams can communicate high-level meaning, but require manual effort and updates, whereas automatically generated diagrams faithfully expose individual operations without necessarily explaining how they form meaningful components. Earlier quantum visualizations provide complementary perspectives: ShorVis relates algorithm execution to circuit and state representations, QuFlow shows parameter flow, GraphStateVis explores graph states and stabilizers, and VACSEN supports noise awareness. Quantivine instead concentrates on the structure of the circuit and the semantic information in the program that constructs it. The work also draws on abstract syntax trees for code comprehension, graph summarization through node grouping and edge bundling, and visual abstraction of repeated motifs. Its contribution is to adapt these ideas to quantum circuits while retaining familiar circuit notation and the ordering constraints of operations. It does not introduce a quantum algorithm or claim that every quantum computation achieves an exponential speedup. Two domain experts participated in iterative interviews and throughout the research process. Their requirements were to clarify hierarchical circuit components, simplify repetitive gate patterns, reveal context such as qubit provenance and gate placement, and support familiar visual designs with flexible control of detail. These requirements connect circuit comprehension to practical activities such as debugging a component and identifying idle intervals that might warrant a different gate placement. ## From source code to circuit components The implemented prototype is a Visual Studio Code plugin for circuits constructed in Python with Qiskit. Its four-stage pipeline comprises code processing, component segmentation, pattern abstraction, and context enhancement, as shown schematically in Figures 3 and 4. The input is the circuit-construction code, rather than only a flattened list of gates. Compilation supplies the qubits, gates, qubit associations, and operation ordering, while an abstract syntax tree supplies a hierarchy of circuit-construction functions. Rule-based analysis of loop statements identifies repetition patterns. Because static syntax alone cannot precisely align each generated gate with its source-level component, the system instruments circuit construction to track gate insertion and associate the resulting gates with semantic tree nodes. Users control component granularity by folding or unfolding that tree. Each gate receives a label for its relevant semantic node and a loop-time label that distinguishes separate instances created by repeated execution of the same function. Gates sharing the appropriate labels are aggregated into component gates, or super-gates. The system also bundles contiguous qubit wires into a super-bit when they pass through the same sequence of displayed primitive or component gates across the circuit. Sharing a local connection is insufficient for bundling because the wires may play different roles elsewhere. This is a graphical aggregation of circuit structure, not a claim that the underlying quantum states are identical. Grouping and bundling require a new layout. Quantivine arranges gates within each semantic node using their insertion order, puts them at the leftmost available positions on their associated wires, resolves visual intersections, and combines the layouts from child nodes upward. The result preserves the organization of components while shortening the drawing where the ordering allows it. The paper describes this bottom-up layout procedure, but does not provide a proof of globally optimal circuit length or an optimal hardware schedule. ## Abstraction of repetitive patterns A survey of 18 benchmark quantum algorithms, combined with expert input, motivates three directional repetition patterns in Figure 5. Vertical repetition applies the same operation across a sequence of qubits, such as Hadamard gates on all wires. Horizontal repetition places similar operations successively on one wire, such as a sequence of $R_z$ gates. Diagonal repetition creates a sequence of operations on successive groups of qubits, such as a chain of neighboring controlled-X gates. These patterns describe recurring structure in the surveyed circuits rather than an exhaustive classification of all possible quantum programs. For each repeated group, Quantivine retains the first two subcircuits and the last subcircuit and uses dots to indicate intermediate repetitions. Figure 6 explains the construction with a schematic example. The method first maps the circuit drawing to a grid, marks the rows and columns needed to expose the starts and ends of repeated patterns, determines which gates have all their connected qubits visible, and then renders the retained gates while collapsing contiguous empty rows and columns. The completion stage considers the whole gate, so a multi-qubit glyph is not represented by arbitrarily retaining only part of its connections. The final drawing combines abbreviated repetitions with the visible components needed to interpret them. This is a visual simplification of a circuit representation, not an elimination of gates from the executable computation. ## Visual encoding and interaction Figure 8 of the paper shows the coordinated interface for a variational quantum classifier, identified in the screenshot as having 10 qubits, 112 gates, and 41 layers. The Structure View on the left is a tree of functions, component gates, primitive gates, and repetitive patterns, together with a qubit list. The Component View retains horizontal qubit wires and recognizable gate glyphs but replaces folded subcircuits with labeled component boxes. The Abstraction View uses the same level of component detail while additionally compressing repetition with dot notation. Expanding or collapsing tree nodes changes the level of detail, and selecting a node highlights its corresponding gates in both circuit views. These linked views allow users to relate a high-level component to the operations that implement it. The provenance view projects the operations applied to a selected qubit onto a timeline while preserving relative intervals. Labels on multi-qubit operations identify other participating qubits. Selecting a qubit in the tree updates this view, and selecting a gate on the timeline navigates to its placement in the context display. Provenance here is the sequence of circuit operations affecting the qubit; the view does not plot simulated amplitudes or reconstruct the evolving quantum state. The placement view augments the circuit wires with a blue-to-red encoding of low-to-high parallelism. It shades idle space around selected gates and their parallel operations and adds marks near wire ends to indicate idle extent beyond the available view. A threshold control adjusts the parallelism display, and clicking a column exposes possible adjustment locations for its parallel operations. Figure 7 presents these encodings schematically, while Figure 8 shows them in the interface. They help a researcher inspect placement alternatives; the paper does not describe an automatic optimizer that selects and verifies a globally optimal replacement schedule. The connectivity view uses an adjacency matrix whose cell $(i,j)$ indicates whether qubits $i$ and $j$ are directly linked by one or more multi-qubit gates. The displayed legend distinguishes absent, existing, and new links, and colored glyphs below the matrix encode what the paper calls current and previous entanglement groups. Users select components to inspect their corresponding connectivity and group changes. The paper explains the visual encoding of these groups but does not provide a state-simulation-based validation of the entanglement display. The matrix should therefore be understood as the circuit-context representation reported by the authors, rather than evidence of a quantified entanglement measure. ## Usage scenarios The first scenario explores a 99-qubit quantum generative adversarial network circuit, shown in Figure 9 with 343 gates and 102 layers. An expert begins with the discriminator, generator, and SWAP-test components, then expands the discriminator and generator to inspect their unitary and entanglement subcomponents. The abstraction view exposes chains of $R_{yy}$ and controlled-$R_y$ operations, while the matrix offers another view of how the components connect qubits. The provenance of the SWAP-test control qubit shows a Hadamard operation, controlled swaps, and a final Hadamard operation. The placement view reveals a long idle interval and a potential later position for the first Hadamard gate. This scenario demonstrates how a researcher can identify an opportunity to adjust a circuit, but it does not report an executed hardware experiment or a measured reduction in noise after that adjustment. The second scenario concerns debugging a 15-qubit quantum multiplier in Figure 10. An expert first checks the high-level components, then expands their structure to locate an incorrect composition involving UnCarry and Sum within an adder. The organized circuit diagram guides the expert back to the underlying code, where the paper reports that the bug was located and fixed. The figure includes the corrected composition as an inset. This is a reported expert usage example, not a benchmark of automatic bug detection or a comparison of debugging accuracy with another tool. ## User evaluation and findings The formal evaluation is a qualitative expert study using Quantivine as a technology probe. It involved ten quantum researchers aged 22 to 30, with circuit-development experience ranging from less than one year to more than eight years. Four mainly worked with circuits of up to 20 qubits, while the others had worked with circuits exceeding 50 qubits. The researchers prepared six circuits representing different algorithms, each containing 30 to 99 qubits and more than ten hierarchical components, together with descriptions and source code. After an introduction and training, participants performed a circuit-depiction task and a context-analysis task, including creating at least two levels of structure and one visual abstraction. The study collected think-aloud observations, semi-structured interviews, and five-point Likert questionnaire responses. Figure 11 presents distributions of subjective responses, rather than timings, error rates, or benchmark scores. The reported mean ratings were 4.7 with a standard deviation of 0.5 for effectiveness, 4.6 with a standard deviation of 0.6 for visual design, 4.7 with a standard deviation of 0.5 for usability, and 4.4 with a standard deviation of 0.8 for interaction. Participants valued hierarchical component organization, adjustable detail, repetition abstraction, and placement cues. Responses to the matrix were more mixed: some participants found it unfamiliar, while others saw value for connectivity and entanglement analysis. Participants also requested more information about noise, gate parameters, and intermediate or final qubit states, as well as annotation and saving features. These findings support the usefulness and acceptability of the approach for the participating researchers and the explored circuits. The study does not report a controlled baseline comparison or objective evidence that users work faster, make fewer errors, or produce better hardware executions. The abstract describes circuits with up to 100 qubits, while the concrete large scenario and evaluation circuit range reach 99 qubits. Consequently, the reported evidence supports exploration at roughly this scale, rather than unrestricted scalability. ## Contributions, limitations, and future work The central contribution is a circuit visualization pipeline that links generated gates to the functions and loops responsible for them, then uses that relationship to produce coordinated component, repetition, and context views. The design requirements, the repetition patterns surveyed across 18 benchmark algorithms, and the implemented Quantivine prototype form complementary contributions. Together they show how source-level organization can make a detailed circuit drawing navigable without requiring users to abandon familiar wire-and-gate notation. The implemented scope is static circuits constructed with Python and Qiskit. Although the authors argue that the semantic approach could extend to other languages, that generalization is proposed rather than evaluated. The rule-based pattern extraction could also be extended to more complex patterns, potentially using learned inference. The paper acknowledges rendering, perception, and interaction difficulties for fully expanded circuits and matrices when scaling into hundreds of qubits, and proposes improved rendering and interactions for large graphs and matrices. The existing prototype is oriented toward experts; direct diagram manipulation, synchronization with source code, user-defined gate grouping, and a more accessible interface are future directions. Further proposed work includes integration with other programming and simulation tools and real-time visualization of circuit execution.